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HUF75852G3
TM
Data Sheet
April 2000
File Number
4846
75A, 150V, 0.016 Ohm, N-Channel, UltraFET Power MOSFET Packaging
JEDEC TO-247
SOURCE DRAIN GATE
Features
* Ultra Low On-Resistance - rDS(ON) = 0.016, VGS = 10V * Simulation Models - Temperature Compensated PSPICETM and SABER(c) Electrical Models - Spice and SABER(c) Thermal Impedance Models - www.intersil.com
DRAIN (TAB)
* Peak Current vs Pulse Width Curve * UIS Rating Curve
Symbol
D
Ordering Information
PART NUMBER HUF75852G3
G
PACKAGE TO-247
BRAND 75852G
S
Absolute Maximum Ratings
TC = 25oC, Unless Otherwise Specified HUF75852G3 UNITS V V V A A 150 150 20 75 75 Figure 4 Figures 6, 14, 15 500 3.33 -55 to 175 300 260 W W/oC
oC oC oC
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDSS Drain to Gate Voltage (RGS = 20k) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS Drain Current Continuous (TC = 25oC, VGS = 10V) (Figure 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Continuous (TC = 100oC, VGS = 10V) (Figure 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .IDM Pulsed Avalanche Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .UIS Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD Derate Above 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .TL Package Body for 10s, See Techbrief TB334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg NOTE: 1. TJ = 25oC to 150oC.
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
1
CAUTION: These devices are sensitive to electrostatic discharge. Follow proper ESD Handling Procedures. UltraFETTM is a trademark of Intersil Corporation. PSPICETM is a trademark of MicroSim Corporation. 1-888-INTERSIL or 321-724-7143 | Intersil and Design is a trademark of Intersil Corporation. | Copyright (c) Intersil Corporation 2000 SABER(c) is a Copyright of Analogy Inc.
HUF75852G3
Electrical Specifications
PARAMETER OFF STATE SPECIFICATIONS Drain to Source Breakdown Voltage Zero Gate Voltage Drain Current BVDSS IDSS ID = 250A, VGS = 0V (Figure 11) VDS = 140V, VGS = 0V VDS = 135V, VGS = 0V, TC = 150oC Gate to Source Leakage Current ON STATE SPECIFICATIONS Gate to Source Threshold Voltage Drain to Source On Resistance THERMAL SPECIFICATIONS Thermal Resistance Junction to Case Thermal Resistance Junction to Ambient RJC RJA TO-247 0.30 30
oC/W oC/W
TC = 25oC, Unless Otherwise Specified SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
150 -
-
1 250 100
V A A nA
IGSS
VGS = 20V
VGS(TH) rDS(ON)
VGS = VDS, ID = 250A (Figure 10) ID = 75A, VGS = 10V (Figure 9)
2 -
0.013
4 0.016
V W
SWITCHING SPECIFICATIONS (VGS = 10V) Turn-On Time Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Turn-Off Time GATE CHARGE SPECIFICATIONS Total Gate Charge Gate Charge at 10V Threshold Gate Charge Gate to Source Gate Charge Gate to Drain "Miller" Charge CAPACITANCE SPECIFICATIONS Input Capacitance Output Capacitance Reverse Transfer Capacitance CISS COSS CRSS VDS = 25V, VGS = 0V, f = 1MHz (Figure 12) 7690 1650 535 pF pF pF Qg(TOT) Qg(10) Qg(TH) Qgs Qgd VGS = 0V to 20V VGS = 0V to 10V VGS = 0V to 2V VDD = 75V, ID = 75A, Ig(REF) = 1.0mA (Figures 13, 16, 17) 400 215 15 25 66 480 260 17.5 nC nC nC nC nC tON td(ON) tr td(OFF) tf tOFF VDD = 75V, ID = 75A VGS = 10V, RGS = 2.0 (Figures 18, 19) 22 151 82 107 260 285 ns ns ns ns ns ns
Source to Drain Diode Specifications
PARAMETER Source to Drain Diode Voltage SYMBOL VSD ISD = 75A ISD = 35A Reverse Recovery Time Reverse Recovered Charge trr QRR ISD = 75A, dISD/dt = 100A/s ISD = 75A, dISD/dt = 100A/s TEST CONDITIONS MIN TYP MAX 1.25 1.00 260 1830 UNITS V V ns nC
2
HUF75852G3 Typical Performance Curves
1.2 POWER DISSIPATION MULTIPLIER 1.0 0.8 0.6 0.4 0.2 0 0 25 50 75 100 125 150 175 TC , CASE TEMPERATURE (oC) 0 25 50 75 100 125 150 175 TC, CASE TEMPERATURE (oC) 80
ID, DRAIN CURRENT (A)
60 VGS = 10V 40
20
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE
2 1 THERMAL IMPEDANCE ZJC, NORMALIZED DUTY CYCLE - DESCENDING ORDER 0.5 0.2 0.1 0.05 0.02 0.01
0.1 PDM NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZJC x RJC + TC 10-3 10-2 t, RECTANGULAR PULSE DURATION (s) 10-1 100
SINGLE PULSE 0.01 10-5 10-4
t1 t2 101
FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
2000 TC = 25oC IDM , PEAK CURRENT (A) 1000 FOR TEMPERATURES ABOVE 25oC DERATE PEAK CURRENT AS FOLLOWS: I = I25 175 - TC 150
VGS = 10V
100
TRANSCONDUCTANCE MAY LIMIT CURRENT IN THIS REGION 10-4 10-3 10-2 t, PULSE WIDTH (s) 10-1 100 101
50 10-5
FIGURE 4. PEAK CURRENT CAPABILITY
3
HUF75852G3 Typical Performance Curves
1000 IAS , AVALANCHE CURRENT (A)
(Continued)
1000 If R = 0 tAV = (L)(IAS)/(1.3*RATED BVDSS - VDD) If R 0 tAV = (L/R)ln[(IAS*R)/(1.3*RATED BVDSS - VDD) +1]
ID , DRAIN CURRENT (A)
100 100s
100 STARTING TJ = 25oC STARTING TJ = 150oC
10
OPERATION IN THIS AREA MAY BE LIMITED BY rDS(ON)
1ms 10ms
1 1 10
SINGLE PULSE TJ = MAX RATED TC = 25oC 100
10 0.01 500
0.1 1 tAV, TIME IN AVALANCHE (ms)
10
VDS , DRAIN TO SOURCE VOLTAGE (V)
NOTE: Refer to Intersil Application Notes AN9321 and AN9322. FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING CAPABILITY
FIGURE 5. FORWARD BIAS SAFE OPERATING AREA
200 PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX VDD = 15V 150
200 VGS = 20V ID , DRAIN CURRENT (A) 150 VGS = 10V VGS = 7V VGS = 6V VGS =5V 100
ID , DRAIN CURRENT (A)
100 TJ = 175oC 50
TJ = 25oC
50
0 2 3 4
TJ = -55oC 5 6
PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX TC = 25oC 0 1 2 3 4 5 6
0 VDS , DRAIN TO SOURCE VOLTAGE (V)
VGS , GATE TO SOURCE VOLTAGE (V)
FIGURE 7. TRANSFER CHARACTERISTICS
FIGURE 8. SATURATION CHARACTERISTICS
2.8 NORMALIZED DRAIN TO SOURCE ON RESISTANCE PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX 2.2 NORMALIZED GATE THRESHOLD VOLTAGE
1.2 VGS = VDS, ID = 250A 1.0
1.6
0.8
1.0 VGS = 10V, ID = 75A 0.4 -80 -40 0 40 80 120 160 200
0.6
0.4 -80
-40
0
40
80
120
160
200
TJ, JUNCTION TEMPERATURE (oC)
TJ, JUNCTION TEMPERATURE (oC)
FIGURE 9. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE
FIGURE 10. NORMALIZED GATE THRESHOLD VOLTAGE vs JUNCTION TEMPERATURE
4
HUF75852G3 Typical Performance Curves
1.2 NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE ID = 250A 10000 C, CAPACITANCE (pF) CRSS = CGD
(Continued)
20000 CISS = CGS + CGD
1.1
1000
1.0
COSS CDS + CGD
VGS = 0V, f = 1MHz 0.9 -80 -40 0 40 80 120 160 200 100 0.1 1.0 10 100
TJ , JUNCTION TEMPERATURE (oC)
VDS , DRAIN TO SOURCE VOLTAGE (V)
FIGURE 11. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs JUNCTION TEMPERATURE
FIGURE 12. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
10 VGS , GATE TO SOURCE VOLTAGE (V)
VDD = 75V
8
6
4 WAVEFORMS IN DESCENDING ORDER: ID = 75A ID = 30A 0 50 100 150 Qg, GATE CHARGE (nC) 200 250
2
0
NOTE: Refer to Intersil Application Notes AN7254 and AN7260. FIGURE 13. GATE CHARGE WAVEFORMS FOR CONSTANT GATE CURRENT
Test Circuits and Waveforms
VDS BVDSS L VARY tP TO OBTAIN REQUIRED PEAK IAS VGS DUT tP RG IAS VDD tP VDS VDD
+
-
0V
IAS 0.01
0 tAV
FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 15. UNCLAMPED ENERGY WAVEFORMS
5
HUF75852G3 Test Circuits and Waveforms
VDS RL VDD VDS VGS = 20V VGS
+
(Continued)
Qg(TOT)
Qg(10) VDD VGS VGS = 2V 0 Qg(TH) Qgs Ig(REF) 0 Qgd VGS = 10V
DUT Ig(REF)
FIGURE 16. GATE CHARGE TEST CIRCUIT
FIGURE 17. GATE CHARGE WAVEFORMS
VDS
tON td(ON) RL VDS
+
tOFF td(OFF) tr tf 90%
90%
VGS
DUT RGS
VDD 0
10% 90%
10%
VGS VGS 0 10%
50% PULSE WIDTH
50%
FIGURE 18. SWITCHING TIME TEST CIRCUIT
FIGURE 19. SWITCHING TIME WAVEFORM
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HUF75852G3 PSPICE Electrical Model
.SUBCKT HUF75852 2 1 3 ;
CA 12 8 12.0e-9 CB 15 14 12.0e-9 CIN 6 8 7.15e-9 DBODY 7 5 DBODYMOD DBREAK 5 11 DBREAKMOD DPLCAP 10 5 DPLCAPMOD
10
rev 26 Oct 1999
LDRAIN DPLCAP 5 RLDRAIN DBREAK 11 + 17 EBREAK 18 MWEAK MMED MSTRO CIN LSOURCE 8 RSOURCE RLSOURCE S1A 12 S1B CA 13 + EGS 6 8 EDS 13 8 S2A 14 13 S2B CB + 5 8 8 22 RVTHRES 14 IT VBAT + 15 17 RBREAK 18 RVTEMP 19 7 SOURCE 3 DRAIN 2 RSLC1 51 ESLC 50 RDRAIN EVTHRES + 19 8 6 21 16
RSLC2
5 51 ESG 6 8 + LGATE GATE 1 RLGATE EVTEMP RGATE + 18 22 9 20 -
IT 8 17 1 LDRAIN 2 5 1.0e-9 LGATE 1 9 7.46e-9 LSOURCE 3 7 3.87e-9 MMED 16 6 8 8 MMEDMOD MSTRO 16 6 8 8 MSTROMOD MWEAK 16 21 8 8 MWEAKMOD RBREAK 17 18 RBREAKMOD 1 RDRAIN 50 16 RDRAINMOD 9.50e-3 RGATE 9 20 0.80 RLDRAIN 2 5 10 RLGATE 1 9 74.6 RLSOURCE 3 7 38.7 RSLC1 5 51 RSLCMOD 1e-6 RSLC2 5 50 1e3 RSOURCE 8 7 RSOURCEMOD 2.37e-3 RVTHRES 22 8 RVTHRESMOD 1 RVTEMP 18 19 RVTEMPMOD 1 S1A S1B S2A S2B 6 12 13 8 S1AMOD 13 12 13 8 S1BMOD 6 15 14 13 S2AMOD 13 15 14 13 S2BMOD
VBAT 22 19 DC 1 ESLC 51 50 VALUE={(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)/(1e-6*245),2.5))} .MODEL DBODYMOD D (IS = 6.03e-12 RS = 2.17e-3 TRS1 = 1.97e-3 TRS2 = 1.03e-6 CJO = 7.91e-9 TT = 1.69e-7 M = 0.60) .MODEL DBREAKMOD D (RS = 3.53e-1 TRS1 = 0 TRS2 = 0) .MODEL DPLCAPMOD D (CJO = 9.52e-9 IS = 1e-30 N = 1 M = 0.88) .MODEL MMEDMOD NMOS (VTO = 3.05 KP = 8.50 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u RG = 0.80) .MODEL MSTROMOD NMOS (VTO = 3.53 KP = 215 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u) .MODEL MWEAKMOD NMOS (VTO = 2.63 KP = 0.075 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u RG = 8.0 ) .MODEL RBREAKMOD RES (TC1 = 1.12e-3 TC2 = -1.00e-7) .MODEL RDRAINMOD RES (TC1 = 1.03e-2 TC2 = 3.04e-5) .MODEL RSLCMOD RES (TC1 = 2.52e-3 TC2 = 0) .MODEL RSOURCEMOD RES (TC1 = 1.01e-3 TC2 = 0) .MODEL RVTHRESMOD RES (TC1 = -3.65e-3 TC2 = -1.55e-5) .MODEL RVTEMPMOD RES (TC1 = -2.85e-3 TC2 = 0) .MODEL S1AMOD VSWITCH (RON = 1e-5 .MODEL S1BMOD VSWITCH (RON = 1e-5 .MODEL S2AMOD VSWITCH (RON = 1e-5 .MODEL S2BMOD VSWITCH (RON = 1e-5 .ENDS ROFF = 0.1 ROFF = 0.1 ROFF = 0.1 ROFF = 0.1 VON = -3.5 VON = -3.0 VON = -2.5 VON = -0.5 VOFF= -3.0) VOFF= -3.5) VOFF= -0.5) VOFF= -2.5)
NOTE: For further discussion of the PSPICE model, consult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global Temperature Options; IEEE Power Electronics Specialist Conference Records, 1991, written by William J. Hepp and C. Frank Wheatley.
7
+
EBREAK 11 7 17 18 159.2 EDS 14 8 5 8 1 EGS 13 8 6 8 1 ESG 6 10 6 8 1 EVTHRES 6 21 19 8 1 EVTEMP 20 6 18 22 1
DBODY
HUF75852G3 SABER Electrical Model
REV 26 Oct 1999 template huf75852 n2,n1,n3 electrical n2,n1,n3 { var i iscl d..model dbodymod = (is = 6.03e-12, cjo = 7.91e-9, tt = 1.69e-7, m = 0.60) d..model dbreakmod = () d..model dplcapmod = (cjo = 9.52e-9, is = 1e-30, n=1, m = 0.88 ) m..model mmedmod = (type=_n, vto = 3.05, kp = 8.50, is = 1e-30, tox = 1) m..model mstrongmod = (type=_n, vto = 3.53, kp = 215, is = 1e-30, tox = 1) m..model mweakmod = (type=_n, vto = 2.63, kp = 0.075, is = 1e-30, tox = 1) sw_vcsp..model s1amod = (ron = 1e-5, roff = 0.1, von = -3.5, voff = -3) sw_vcsp..model s1bmod = (ron =1e-5, roff = 0.1, von = -3, voff = -3.5) sw_vcsp..model s2amod = (ron = 1e-5, roff = 0.1, von = -2.5, voff = -0.5) sw_vcsp..model s2bmod = (ron = 1e-5, roff = 0.1, von = -0.5, voff = -2.5) c.ca n12 n8 = 12.0e-9 c.cb n15 n14 = 12.0e-9 c.cin n6 n8 = 7.15e-9 d.dbody n7 n71 = model=dbodymod d.dbreak n72 n11 = model=dbreakmod d.dplcap n10 n5 = model=dplcapmod i.it n8 n17 = 1 l.ldrain n2 n5 = 1.0e-9 l.lgate n1 n9 = 7.46e-9 l.lsource n3 n7 = 3.87e-9
GATE 1 RLGATE CIN LGATE ESG + EVTEMP RGATE + 18 22 9 20 6 MSTRO 8 6 8 EVTHRES + 19 8
LDRAIN DPLCAP 10 RSLC1 51 RSLC2 ISCL 50 RDRAIN 21 16 MWEAK MMED EBREAK + 17 18 RSOURCE RLSOURCE DBODY RLDRAIN RDBREAK 72 DBREAK 11 71 RDBODY 5 DRAIN 2
LSOURCE 7
m.mmed n16 n6 n8 n8 = model=mmedmod, l=1u, w=1u m.mstrong n16 n6 n8 n8 = model=mstrongmod, l=1u, w=1u m.mweak n16 n21 n8 n8 = model=mweakmod, l=1u, w=1u
S1A S2A 14 13 S2B 13 + EGS 6 8 EDS CB + 5 8 14 15
SOURCE 3
res.rbreak n17 n18 = 1, tc1 = 1.12e-3, tc2 = -1.00e-7 res.rdbody n71 n5 = 2.17e-3, tc1 = 1.97e-3, tc2 = 1.03e-6 res.rdbreak n72 n5 = 3.53e-1, tc1 = 0, tc2 = 0 res.rdrain n50 n16 = 9.50e-3, tc1 = 1.03e-2, tc2 = 3.04e-5 res.rgate n9 n20 = 0.80 res.rldrain n2 n5 = 10 res.rlgate n1 n9 = 74.6 res.rlsource n3 n7 = 38.7 res.rslc1 n5 n51 = 1e-6, tc1 = 2.52e-4, tc2 = 0 res.rslc2 n5 n50 = 1e3 res.rsource n8 n7 = 2.37e-3, tc1 = 1.01e-3, tc2 = 0 res.rvtemp n18 n19 = 1, tc1 = -2.85e-3, tc2 = 0 res.rvthres n22 n8 = 1, tc1 = -3.65e-3, tc2 = -1.55e-5 spe.ebreak n11 n7 n17 n18 = 159.2 spe.eds n14 n8 n5 n8 = 1 spe.egs n13 n8 n6 n8 = 1 spe.esg n6 n10 n6 n8 = 1 spe.evtemp n20 n6 n18 n22 = 1 spe.evthres n6 n21 n19 n8 = 1 sw_vcsp.s1a n6 n12 n13 n8 = model=s1amod sw_vcsp.s1b n13 n12 n13 n8 = model=s1bmod sw_vcsp.s2a n6 n15 n14 n13 = model=s2amod sw_vcsp.s2b n13 n15 n14 n13 = model=s2bmod v.vbat n22 n19 = dc=1
12
13 8 S1B
RBREAK 17 18 RVTEMP 19 IT VBAT + 8 RVTHRES 22
CA
equations { i (n51->n50) +=iscl iscl: v(n51,n50) = ((v(n5,n51)/(1e-9+abs(v(n5,n51))))*((abs(v(n5,n51)*1e6/245))** 2.5)) } }
8
HUF75852G3 SPICE Thermal Model
REV 19 Oct 1999 HUF75852T CTHERM1 th 6 9.75e-3 CTHERM2 6 5 3.90e-2 CTHERM3 5 4 2.50e-2 CTHERM4 4 3 2.95e-2 CTHERM5 3 2 6.55e-2 CTHERM6 2 tl 12.55 RTHERM1 th 6 1.96e-3 RTHERM2 6 5 4.89e-3 RTHERM3 5 4 1.38e-2 RTHERM4 4 3 7.73e-2 RTHERM5 3 2 1.17e-1 RTHERM6 2 tl 1.55e-2
th JUNCTION
RTHERM1
CTHERM1
6
RTHERM2
CTHERM2
5
SABER Thermal Model
SABER thermal model HUF75852T template thermal_model th tl thermal_c th, tl { ctherm.ctherm1 th 6 = 9.75e-3 ctherm.ctherm2 6 5 = 3.90e-2 ctherm.ctherm3 5 4 = 2.50e-2 ctherm.ctherm4 4 3 = 2.95e-2 ctherm.ctherm5 3 2 = 6.55e-2 ctherm.ctherm6 2 tl = 12.55 rtherm.rtherm1 th 6 = 1.96e-3 rtherm.rtherm2 6 5 = 4.89e-3 rtherm.rtherm3 5 4 = 1.38e-2 rtherm.rtherm4 4 3 = 7.73e-2 rtherm.rtherm5 3 2 = 1.17e-1 rtherm.rtherm6 2 tl = 1.55e-2 }
RTHERM3
CTHERM3
4
RTHERM4
CTHERM4
3
RTHERM5
CTHERM5
2
RTHERM6
CTHERM6
tl
CASE
9
HUF75852G3 TO-247
3 LEAD JEDEC STYLE TO-247 PLASTIC PACKAGE
E A OS Q OR D TERM. 4 OP
INCHES SYMBOL A b b1 b2 c D MIN 0.180 0.046 0.060 0.095 0.020 0.800 0.605 MAX 0.190 0.051 0.070 0.105 0.026 0.820 0.625
MILLIMETERS MIN 4.58 1.17 1.53 2.42 0.51 20.32 15.37 MAX 4.82 1.29 1.77 2.66 0.66 20.82 15.87 NOTES 2, 3 1, 2 1, 2 1, 2, 3 4 4 5 1 -
L1 L
b1 b2 c b
1 2 3 J1 3 2 1
E e e1 J1 L L1 OP Q OR OS
0.219 TYP 0.438 BSC 0.090 0.620 0.145 0.138 0.210 0.195 0.260 0.105 0.640 0.155 0.144 0.220 0.205 0.270
5.56 TYP 11.12 BSC 2.29 15.75 3.69 3.51 5.34 4.96 6.61 2.66 16.25 3.93 3.65 5.58 5.20 6.85
e e1
BACK VIEW
NOTES: 1. Lead dimension and finish uncontrolled in L1. 2. Lead dimension (without solder). 3. Add typically 0.002 inches (0.05mm) for solder coating. 4. Position of lead to be measured 0.250 inches (6.35mm) from bottom of dimension D. 5. Position of lead to be measured 0.100 inches (2.54mm) from bottom of dimension D. 6. Controlling dimension: Inch. 7. Revision 1 dated 1-93.
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NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (321) 724-7000 FAX: (321) 724-7240 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 ASIA Intersil (Taiwan) Ltd. 7F-6, No. 101 Fu Hsing North Road Taipei, Taiwan Republic of China TEL: (886) 2 2716 9310 FAX: (886) 2 2715 3029
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